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Design energy-efficient AC-DC power supplies without MCU (and coding)

Technology Cover
Date de Parution: 2023-08-14, ON Semiconductor

The power grid is designed to run on alternating current for a number of reasons, but almost every device needs direct current to operate. As a result, AC-DC power supplies are almost everywhere, and with increased environmental awareness and rising energy prices, the efficiency of such power supplies is essential to reduce operating costs and rational use of energy.

Simply put, efficiency is the ratio of input power to output power. However, the input power factor (PF), which is the ratio of the useful (actual) power of all AC-powered devices (including power supplies) to the total (apparent) power, must be considered.

For a pure resistive load, the PF will be 1.00 (the "unit"), but as the apparent power increases, the reactive load will reduce the PF, resulting in reduced efficiency. PF less than 1 is caused by out-of-phase voltages and currents, which often cause high harmonic content or distortion of current waveform in discontinuous electronic loads such as switched type power supplies (SMPS).

PF correction

Given the effect of low PF on efficiency, when the power level is higher than 70W, regulations require designers to correct the PF to close to 1 through the circuit. Typically, active PF correction (PFC) uses a boost converter to convert the rectified power supply to a high DC level. This power rail is then adjusted using pulse width modulation (PWM) or other techniques.

This approach is generally effective and easy to deploy. However, many of today's efficiency requirements, such as the challenging "80+ Titanium standard," specify efficiency over the entire wide operating power range, requiring a peak efficiency of 96% at half load. This means that the line rectification and PFC stage must reach 98%, as the following PWM DC-DC will lose a further 2%. It is very difficult to do this because the diodes in bridge rectifiers also lose out.

Replacing the boost diode with a synchronous rectifier can help, or, alternatively, two linear rectifier diodes can be replaced to further improve efficiency. This topology is called Totem Pole PFC (TPPFC), and theoretically, with ideal inductors and switches, the efficiency will be close to 100%. While silicon MOSFETs have good performance, the performance of wide band gap (WBG) devices is closer to "ideal" levels.

Figure 1: Simplified totem pole PFC topology

          


Processing loss

As designers continue to increase the frequency to reduce the size of the magnetic component, the dynamic loss of the switching device increases. Because these losses for silicon MOSFETs can be large, designers are turning to WBG materials, which include silicon carbide (SiC) and gallium nitride (GaN), especially for TPPFC applications.

Critical on-mode (CrM) is often the preferred method for TPPFC designs with power levels up to several hundred watts, which balances efficiency and EMI performance. In kilowatt-level designs, continuous on-mode (CCM) further reduces the RMS current within the switch, thereby reducing on-loss.


Figure 2: Typical PFC circuit: traditional boost (left) and bridgeless totem pole (right)

      

Even CrM is nearly 10% less efficient under light load, which is not conducive to achieving the "80+ Titanium standard." The clamping (" retracting ") maximum frequency forces the circuit into discontinuous on-mode (DCM) under light load, which significantly reduces peak current.

Address design complexity

Due to the need to drive four active devices synchronously, and the need to detect zero-current crossover of inductors to force CrM, the TPPFC design is no mean feat. In addition, the circuit must be able to switch in/out DCM while maintaining a high power factor and generating a PWM signal to regulate the output, and providing circuit protection (such as overcurrent and overvoltage).

The most obvious way to solve these complex challenges is to deploy microcontrollers (MCUS) to execute control algorithms. But this requires generating and debugging code, which increases the effort and risk of the design.

Crm-based TPPFC requires no coding

However, using a fully integrated TPPFC control scheme eliminates the need for time-consuming coding. These devices offer several advantages, including high performance, shorter design times, and lower design risk because they no longer require the deployment of MCUS and associated code.

The NCP1680 mixed-signal TPPFC controller from onsemi is a good example of this type of device, which can operate with a CrM with constant on-time, ensuring excellent efficiency over the entire wide load range. The integrated device has a frequency reentry "bottom switch" function under light load, which improves efficiency by switching operation at the lowest voltage. The digital voltage control loop is internally compensated to optimize performance over the entire load range while ensuring that the design process remains simple.

NCP1680 Mixed signal TPPFC controller

                

This innovative TPPFC controller uses a novel, low-loss approach to current detection and period-by-cycle flow, providing outstanding protection without the need for external Hall effect sensors, reducing complexity, size and cost.

NCP1680 typical application schematic

  
The full set of control algorithms is embedded in the IC, providing designers with a low-risk, tried and tested solution that delivers high performance at a cost-effective cost.


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